| title: | sparse or discontiguous memory on 32bit mips |
|
ddress>Title: sparse or discontiguous memory on 32bit mips platform
Hi,
Im looking into turning on either sparse memory or discontiguous
memory for a 32 Mips platform (single processor) since we have 2
large memory banks that are nowhere near each other in physical memory.
What has been done in hardware, has been done and so be it.
But since we are an embedded system, we do have memroy constraints and
wish to conserve as much space as possible, we are trying to avoid creating
pagetables for the whole space.
That said, I have a few questions.
1) Are there any 32 Mips platforms where either sparsemem or
discontigmem have been supported?
2) It seems like sparesemem is the wave of the future, am I
correct in assuming that this is simmplier / more efficient /
"better" way to go?
3) Is there anywhere (besides the code) where I can find an article
or some documentation on how sparsemem and/or discontig work? or how
to go about adding support for them in a here to for unsupported
platform?
all info, pointers, hints, advice and comments are much appreciated.
thanks
Mike
|